Recently, the progress in functions of electronic apparatuses has been creating a greater demand for higher density and higher integration level of semiconductor devices, thus promoting the increase in capacity and density of semiconductor packages.
To satisfy such demand, studies are being made, for example, on the technique of stacking a semiconductor chip on another semiconductor chip in multiple layers, to thereby reduce the size and thickness of the semiconductor package and to increase the capacity thereof. Such package generally employs an organic substrate such as a bismaleimide-triazine substrate or a polyimide substrate (patent document 1).
According to the patent document 1, the semiconductor package primarily employs a film-type adhesive for bonding the semiconductor chip and the organic substrate, or the semiconductor chips each other, because it is difficult to apply a proper amount of a conventional paste-type adhesive such that the adhesive is not squeezed out from the semiconductor chip.
In addition, conventional techniques related to the film-type adhesive can be found in patent documents 2 to 4.
The patent document 2 teaches employing an adhesive film constituted of an epoxy resin and acrylic rubber for bonding the semiconductor chip and an interconnect substrate.
The patent document 3 teaches employing an adhesive film predominantly constituted of a phenoxy resin for bonding the semiconductor chip and the interconnect substrate.
The patent document 4 teaches adjusting a minimum viscosity of an adhesive tape at the bonding temperature in a specific range, so as to control the fluidity.
[Patent document 1] JP-A No. 2006-73982
[Patent document 2] JP-A No. 2001-220571
[Patent document 3] JP-A No. 2002-138270
[Patent document 4] JP-A No. H11-12545
The conventional techniques according to the foregoing documents, however, still have a room for improvement in the following aspects.
In the case of bonding the interconnect substrate and the semiconductor chip, since a metal interconnect is provided on the surface of the interconnect substrate and a solder resist covers the surface, the presence of regions where the metal interconnect is present and where it is absent forms unevenness on the surface of the interconnect substrate. The conventional adhesive film for semiconductor is not always capable of properly filling the unevenness upon bonding the semiconductor chip and the interconnect substrate, and a void may be left between the interconnect substrate and the semiconductor chip, which may degrade the reliability of the semiconductor package.
The adhesive film for semiconductor is filled in the unevenness of the interconnect substrate surface through bonding the semiconductor chip and the interconnect substrate with the adhesive film for semiconductor, executing wire bonding between the semiconductor chip and the interconnect substrate, and utilizing the heat and pressure applied in a process of sealing with an encapsulating material, and hence the flow performance of the adhesive film for semiconductor in the encapsulating process plays the key role.
Besides, the semiconductor chips are currently stacked in a larger number of layers and hence a longer time is required for executing the wire bonding, which results in extended thermal history that the adhesive film for semiconductor is to undergo before being sealed with the encapsulating material. The adhesive film for semiconductor is, therefore, cured and loses fluidity before being sealed with the encapsulating material, which leads to the defect that the unevenness of the interconnect substrate surface cannot be properly filled.